SPI DAC + Audio test

Author: Eric Brombaugh

What it is:

This is a simple sawtooth generator written in Verilog which uses one of the four channels in the LT2624 quad SPI (serial peripheral interface) DAC. It comprises a SPI output interface, a ramp generator and an LED driver. The LED driver is just for gee-whiz diagnostics - a quick check that the design actually loaded and is running.

How it works

The entire system runs synchronously from the 50MHz clock. The SPI interface divides that by 2 to get a 25MHz SPI clock which allows it to work off of both edges without DDR foolishness. A simple state machine controls the loading and shifting of a 24-bit parallel-serial shift register. The DAC needs a 24-bit SPI transfer, plus one additional cycle thrown in so the CS line can pulse. This gives 25 SPI clocks per transfer for a 1MHz overall rate. Every time the SPI interface cycles, an enable is generated to get the next sample of data.

Data comes from a simple 12-bit up counter. When an enable pulse is received from the SPI interface, the counter advances by one. With each enable pulse the value rises from 0 to 4095 and starts over, giving us a clean sawtooth at 244.14Hz.

The 8 LEDs are driven with a binary counter similar to the counter used for the sawtooth generator. The least-significant 20 bits of this 28 bit, counter aren't used because they would be toggling too quickly to see.


To get immediate satifaction, simply do the following :-

  1. Open 'impact'
  2. Open the '.ipf' file
  3. Right click on the xc3s500e device shown
  4. Select 'program' from the drop down menu
  5. Click OK, once imPACT has found the programmer

For the full project, do the following :-

  1. Open the '.ise' file
  2. You'll see a Design summary
  3. Double click any of the .v files to see the Verilog code
  4. Double clicking the .ucf file will open the 'User constraints editor' after it's synthesised the design.
  5. Then, to 'build, synthesise and program' the code
  6. Expand the 'Generate programming file process (It's usefull to expand the other Processes so you can watch the flow) as it works
  7. Right click on 'configure device'
  8. Select 'run'
  9. After a while impact will open and repeat as above to 'program' the FPGA

Going further:

This design could easily be extended in several ways:


The project files are all in the .zip file below. The files should extract to a directory called 'spi_test'.